Sampling Circuits
Last Updated on:
Wednesday, June 02, 2021 01:44 PM |
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Circuits Designed by Dave
Johnson, P.E. : |
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AIR TRANSPARENCY MONITOR, XENON FLASH
RECEIVER
I designed this circuit many years ago to monitor the quality of a mile long
column of air for future optical communications experiments. The transmitter
system (circuit 72 below) uses a powerful xenon flash in conjunction with a
large 12 inch Fresnel lens at the transmitter end and a matching 12-inch lens
with a PIN photo diode at the receiver. The receiver system was connected to a
weather station and a computer to collect the changes in intensity of the light
flashes under different weather conditions. It has the potential for a 30+-mile
range. I have also used this system to conduct cloud bounce experiments.
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Links to electronic circuits, electronic schematics and designs for engineers, hobbyists, students &
inventors:
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Air Transparency Monitor, pg 1 - I designed this circuit many
years ago to monitor the quality of a mile long column of air for future
optical communications experiments. The transmitter system (circuit 72
below) uses a powerful xenon flash in conjunction with a large 12 inch
Fresnel lens at the transmitter end and a matching 12-inch lens with a PIN
photo diode at the receiver. The receiver system was connected to a weather
station and a computer to collect the changes in intensity of the light
flashes under different weather conditions. It has the potential for a
30+-mile range. I have also used this system to conduct cloud bounce
experiments. [Designed by David A. Johnson] |
Air Transparency Monitor, pg 2 - This is of the air
transparency monitor receiver circuit. [Designed by David A. Johnson] |
AN-270: Applying IC Sample & Hold Amplifiers - AN-270 Analog
Devices Application Notes....[App Note] |
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AN-284: Implement Infinite Sample-and-Hold Circuits using Analog Input/Output Ports
- AN-284 Analog Devices Application Notes....[App Note] |
Calibrate scope jitter using a transmission line loop - 20-Sep-01 Issue of
EDN Digital-clock-period jitter is the variation in the period of a clock cycle
compared with a nominal (average of many cycles] clock period. To accurately measure
period jitter using an oscilloscope, you must subtract the oscilloscope jitter from
the measured jitter. However, oscilloscopes rarely have a jitter specification, so you
must determine the oscilloscope jitter. [Design Idea by David Cuthbert, Micron
Technology, Boise, ID] |
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Circuit improves on temperature measurement - 2-May-02 Issue of EDN
When current pulses with a stable IHIGH/ILOW ratio modulate a semiconductor junction,
the ensuing voltage difference (for example, ΔVBE for a bipolar transistor] is a
linear function of the absolute (Kelvin] temperature, T. You can use this truism to
make accurate temperature measurements. Technical literature has thoroughly covered
the relationship (references 1 to 4] and has numerou. [Design Idea by Alexander
Bell, Infosoft International Inc, Rego Park, NY] |
Circuit lets you test sample-and-hold Amplifiers - 4-Mar-10 Issue of EDN
Measure voltage drop with a digital voltmeter. [Design Idea by Marián Štofka,
Slovak University of Technology, Bratislava, Slovakia] |
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Dual-input sample-and-hold Amplifier uses no external resistors - 14-Dec-07
Issue of EDN A sample-and-hold Amplifier sums two inputs and holds that sum when
triggered. [Design Idea by Marián Štofka, Slovak University of Technology,
Bratislava, Slovakia] |
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Gain-of-two instrumentation
Amplifier uses no external resistors - 8-Nov-07 Issue of EDN If the
required voltage gain of a sample-and-hold Amplifier is an integer, this circuit
achieves a gain of two without using any power-dissipating external resistors.
[Design Idea by Marián Štofka, Slovak University of Technology, Bratislava, Slovakia] |
Infinite Hold Circuit Zeros Out Long Term Drift - 03/03/94 EDN-Design
Ideas....The infinite-hold circuit in Fig 1 automatically zeros out long-term drift
from an instrument or a sensor. In operation, a control system (not shown]periodically
takes the instrument or sensor off line and applies a known stimulus. The known
stimulus generates a baseline-output signal. [Design Idea by William R Penrose and
Li Pan, Transducer Research, Naperville, IL] |
Inverting sample-and-hold Amplifier requires no external resistors -
2-Aug-07 Issue of EDN Eliminating external feedback resistors in an inverting
sample-and-hold Amplifier allows it to exploit the full bandwidth of its op Amps.
[Design Idea by Marián Štofka, Slovak University of Technology, Bratislava, Slovakia] |
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NCO technique helps µC produce clean analog signals
- 04/15/99 Issue of EDN A recent Design Idea described a method for
producing an analog voltage from one digital output of a µC ("Generate an analog
signal with a µC," EDN,Oct 22, 1998, pg 108]. The method involves generating a PWM
output with a controlled duty cycle and filtering the switching waveform with a simple
single-pole RC filter. Although this method provides an accurate. Page includes
several designs. Scroll to find this one....(EDN Design Ideas] [Design
Idea by Steve Ploss, Veridian Corp, Wright Patterson AFB, OH] |
S/H circuit minimizes aperture - 04/15/99 Issue of EDN Conventional
sample-and-hold (S/H] circuits use one hold capacitor that charges during the track
phase and disconnects during the hold phase. The voltage that the capacitor holds
usually drives an A/D converter that operates synchronously with the S/H control
signal. This approach can sometimes place excessive demands on the S/H circuit's
bandwidth and settling capabilities. You can improve performance. Page includes
several designs. Scroll to find this one. [Design Idea by John Guy, Maxim
Integrated Products, Sunnyvale, CA] |
Sampling peak detector has shutdown feature - 16-May-02 Issue of EDN
You face a serious problem in using a slow ADC with a fast peak detector. The circuit
in Figure 1 allows a slow ADC to measure a fast, sampled signal peak. The 100-MHz peak
detector for ultrasonic-pulse sampling uses a fast MAX4231 Amplifier from Maxim (www.maxim-ic.com].
This Amplifier has a shutdown feature that facilitates power savings without losing
the sampled information. [Design Idea by Shyam Tiwari, Sensors Technology Private
Ltd, Gwalior, India] |
Video Design Idea: Diagnose setup and hold times in synchronous and asynchronous
circuits- 18-Oct-07 Issue of EDN Metastability of digital circuits can
become a problem if you don't properly account for setup and hold times in synchronous
circuits, or at random in the case of asynchronous inputs. [Design Idea by Staff] |
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Sampling Circuits |
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