100 MHz Clock Solution for Desktop Computers:  Pericom Semiconductor Application Brief # 021 (app note added 2/05)

1MV Offset Clock-Tunable Monolithic 5-Pole Lowpass Filter:  DN67  Design Notes (Linear Technology) (app note added 1/06)

28 LED Clock Timer 72 LED Clock:  programmable clock Timer circuit that uses individual LEDs to indicate hours and minutes (added 4/02)

30 Nanosecond Settling Time Measurement for a Precision Wideband Amplifier:  AN79 Linear Technology AN79 modifies methods presented in AN74, permitting verification of 30 nanosecond amplifier settling times to 0.1% resolution.  sampling-based technique used is detailed and results presented. Appendices cover oscilloscope overdrive issues, ...

4 Bit Binary Clock:  (electronic circuit added 7/03)

68HC11 Stepper Motor Control:  (circuit / schematic design added 6/06)

7 Segment LED Counter:  (schematic / circuit added 10/06)

72 LED Clock:  (electronic Circuit diagram added 03/03)

74ACT74 Makes Low-Skew Clock Divider:  12/17/98 EDN-Design Ideas  / (added 11/05)  Serial-data systems often generate an internal clock at twice  data rate for mid-bit sampling or for generating bi-phase codes. External equipment and some internal processes require a clock that runs at  data rate. Simply dividing  twice-rate clock with a flip-flop generates a data-rate clock that is skewed by one logic delay with respect to  input..... 

8 Hints for Making Better RF Counter Measurements (5967-6038e):  Aligent App Note  (added 2/06)

A 1MV Offset Clock-Tunable Monolithic 5-Pole Lowpass Filter:  DN67  Design Notes (Linear Technology) (app note added 1/06)

A Clock Design using the PIC16c54 for LED Displays and Switch Inputs:  Microchip Application Note Published 26-Aug-97   (app note added 6/06)

A Clock Doubling Circuit (500KHz) for CMOS logic:  (circuit design added 9/06)

A Design and Manufacturing Guide for the Lead Frame Chip Scale Package:  AN-772 Analog Devices Application Notes  (app note added 2/06) 

AD9430 Evaluation Board Modifications for XTAL Oscillator Clocking:  AN-616 Analog Devices Application Notes  (app note added 6/06)

ADN2812 Evaluation Board:  AN-657 Analog Devices Application Notes  (app note added 2/06) 

ADN2819 Evaluation Board:  AN-636 Analog Devices Application Notes  (app note added 2/06)  This application note describes  use of  ADN2819 evaluation board. The ADN2819 is a multirate clock recovery, data-retiming device based on a multiloop PLL architecture…..

An Overview of Pericom's Vcxo and Crystal Technology:  Pericom Semiconductor Application Note # 048 (app note added 02/05)

AN-1173: High Speed Bus LVDS Clock Distributionusing the DS92ck16 Clock Distribution Device:  National Semiconductor Application Note   (app note added 2/06)

AN-1439: Use of the LMV112 to Reduce Reference Clock Interaction in Handheld Device:  National Semiconductor Application Note   (app note added 2/06)

AN-291: Asynchronous Clock Interfacing with the AD7878:  AN-291 Analog Devices Application Notes  (app note added 6/06)

AN-616: AD9430 Evaluation Board Modifications for XTAL Oscillator Clocking:  AN-616 Analog Devices Application Notes  (app note added 6/06)

AN-632: Provisionary Data Rates using the AD9951 DDS as an Agile Reference Clock for the ADN2812 Continuous-Rate CDR:  AN-632 Analog Devices Application Notes  (app note added 2/06) 

AN-636: ADN2819 Evaluation Board:  AN-636 Analog Devices Application Notes  (app note added 2/06)  This application note describes  use of  ADN2819 evaluation board. The ADN2819 is a multirate clock recovery, data-retiming device based on a multiloop PLL architecture. The ADN2819 can recover clock....

AN-642: Coupling a Single-Ended Clock Source to the Differential Clock Input of Third-Generation TxDAC® and TxDAC+® Products:  AN-642 Analog Devices Application Notes  (app note added 6/06)

AN-657: ADN2812 Evaluation Board:  AN-657 Analog Devices Application Notes  (app note added 2/06) 

AN-746: Supporting FDDI with the ADN2812:  AN-746 Analog Devices Application Notes  (app note added 2/06) 

AN-756: Sampled Systems and the Effects of Clock Phase Noise and Jitter:  AN-756 Analog Devices Application Notes  (app note added 6/06)

AN-769: Generating Multiple Clock Outputs from the AD9540:  AN-769 Analog Devices Application Notes  (app note added 2/06) 

AN-772: A Design and Manufacturing Guide for the Lead Frame Chip Scale Package (LFCSP):  AN-772 Analog Devices Application Notes  (app note added 2/06) 

AN-823: Direct Digital Synthesizers in Clocking Applications Time Jitter in Direct Digital Synthesizer-Based Clocking Systems:  AN-823 Analog Devices Application Notes  (app note added 2/06) 

AN-984: Power and Thermal Considerations for High Speed Clock Generators:  National Semiconductor Application Note   (app note added 2/06)

AN-988: High Speed Clock Sources and Their Effect on Electromagnetic Compatibility:  National Semiconductor Application Note   (app note added 2/06)

Application of Zero Delay Buffers in Systems with Large Memory Arrays:  Pericom Semiconductor Application Brief # 024 (app note added 02/05)

Application of Zero-Delay Buffers in Switched Ethernet:  Pericom Semiconductor Application Note # 015 (app note added 02/05)

Applying Modern Clock Drivers to Mos Memories:  National Semiconductor Application Note 04 Nov1995 (app note added 6/06)

Asynchronous Clock Interfacing with the AD7878:  AN-291 Analog Devices Application Notes  (app note added 6/06)

AT89C2051 Digital Thermometer and Clock:  (circuit / schematic added 5/03)

Backup Clock Controller Checks Time Setting:  01/05/95 EDN-Design Ideas / (added 6/06)  

Basic PIC16/17 Oscillator Design:  Microchip Application Note Published 10-Apr-02   (app note added 2/06) The oscillator circuit is one of  most overlooked areas of microprocessor circuit design. Components are usually selected based on  manufacturers? tables. If  circuit starts up and works, fine, no or thought need be given to it, right? Wrong. Many conditions can negatively affect  performance of your design.....

Big LED Clock:  (circuit / schematic added 5/03)

Bob Blick's Propeller Clock:  (electronic circuit added 10/06)

Building an Intel 8008 Computer "Clock":  About every year I design and build a new clock. This year’s project is a clock based on an Intel 8008 first generation 8 bit microprocessor. Because it is a fairly unique project I’m putting more effort into the documentation...... (added 10/06)

Cheap 40kHz Clock:  (electronic circuit added 7/03)

Chester's Propeller Clock:  (design added 10/06)

Circuit Allows High Speed Clock Multiplication:  05/02/02 EDN Design Ideas  /  (added 1/05)  In theory, synchronous clock multiplication is an easy task. A simple PLL with two digital dividers—one inserted just after the VCO (voltage-controlled oscillator) and the second one placed directly....

Circuit Avoids Metastability:  08/30/01 EDN Design Ideas  /  (added 02/05)   Consider a computer system that has a host processor connected to a remote-I/O subsystem (Figure 1). The host clock treats the I/O system, which is located far from the main hardware, as a slave. ....

Circuit Conditions Variable Duty Cycle Clock:  02/17/97 EDN-Design Ideas / (added 11/05) The circuit accepts an input clock of any duty cycle and generates any desired duty cycle at the output. You need to add only one flip-flop to the earlier design to generate an arbitrary-duty-cycle output. You can use the circuit to correct a non-50% input to a 50% output or to create a non-50% output from any arbitrary input duty cycle....

Clock Basics:  Pericom Semiconductor Application Brief # 037 (app note added 02/05)

Clock Design using Low Power/Cost Techniques:  Microchip Application Note Published 26-Aug-97   (app note added 2/06)

Clock Design using the PIC16c54 for LED Displays and Switch Inputs:  Microchip Application Note Published 26-Aug-97   (app note added 6/06)

Clock Divider Circuit:  (circuit / schematic design added 6/06)

Clock Divider:  02/17/97 EDN-Design Ideas / (added 11/05) The circuit accepts an input clock of any duty cycle and generates any desired duty cycle at the output. You need to add only one flip-flop to the earlier design to generate an arbitrary-duty-cycle output. You can use the circuit to correct a non-50% input to a 50% output or to create a non-50% output from any arbitrary input duty cycle......

Clock Doubler for CMOS Logic:  Exclusive OR gate (added 6/06)

Clock Fail Circuit Switches to Alternate Clock:  10/24/96 EDN-Design Ideas / (added 6/06)  

Clock Generator:  Use4093 oscillator (added 4/02)

Clock Multiplier Circumvents PLL:  05/13/99 EDN-Design Ideas / (added 2/06)

Clock Performance in Raid Storage Applications: PI6c2502:  Pericom Semiconductor Application Note # 026 (app note added 02/05)

Clock Performance in Registered PC133 SDRAM DIMM Modules: PI6C2510-133:  Pericom Semiconductor Application Note # 023 (app note added 02/05)

Clock Recovery PLL Fits into Single PLD:  11/23/95 EDN-Design Ideas / (added 2/06) 

Clock Recovery Scheme Suits Low Snr Systems:  06/05/00 EDN-Design Ideas / (added 6/06) A clock-recovery architecture can operate with NRZ digital signals, even at low SNRs. A clock-recovery subsystem is based on a PLL comprising a phase comparator, a loop filter, and a voltage-controlled oscillator (VCO)....

Clock Solutions for WIFI (IEEE 802.11):  Pericom Semiconductor Application Note # 070 (app note added 02/05)

Clock Switching Circuit Banishes Glitches:  12/19/96 EDN-Design Ideas / (added 6/06)  

Clock Termination Techniques:  Pericom Semiconductor Application Brief # 023 (app note added 02/05)

Coupling a Single-Ended Clock Source to the Differential Clock Input of Third-Generation TxDAC® and TxDAC+® Products:  AN-642 Analog Devices Application Notes  (app note added 6/06)

Crosstalk on the Clock (Part 2):  Maxim Application Notes / 1841 / Nov-04  (app note added 6/06)

Crystal Considerations with Dallas Real-Time Clocks (RTCs):  Maxim Application Note #58 (app note added 2/05)