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Digital /
Logic Circuits Page 1
Digital or Logic
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Last Updated on:
Saturday, June 27, 2009 04:42 PM |
| Circuits Designed
by Dave Johnson, P.E. : |
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AUDIO FREQUENCY DIGITAL NOISE GENERATOR
When you need to test an audio circuit with broadband noise, this circuit works
great. It uses just three inexpensive C-MOS ICs that generate a series of output
pulses whose widths vary randomly. I included a level control pot.
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C-MOS INVERTER MAKES LOW POWER AMP
With the addition of one resistor and a capacitor, some common logic ICs can be
transformed from digital to analog duties. This circuit outlines some the
features to expect from different inverter ICs.
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CIRCUIT FORMS DIVIDE BY 1.5 COUNTER
Two inexpensive ICs divide a TTL clock signal by 1.5. By following the circuit with
another flip/flop, you could also generate a divide by three function.
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Links to electronic circuits,
electronic schematics, designs for engineers, hobbyists, students & inventors:
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(9435) PCI Performance Measurements - Concepts and Practical Application:
Agilent Application Note (app note added 6/06) |
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µC controls digital potentiometer : 10/08/98 EDN-Design Ideas / (added
11/05) |
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µC Implements Pushbutton Light Dimmers: 06/18/98 EDN-Design Ideas / (added
08/05) A project required building a synchronous-demodulator circuit to track a line
drawn on paper. beauty of synchronous-modulator/demodulator approach is
its inherent noise rejection. method rejects nearly all out-of-band noise, wher
from internal drift or external illumination. This rejection is a boon in optical
tracking, where return signal is inevitably buried in 120-Hz ambient light,
amplifier offsets, and temperature drifts. circuit in Figure 1 is inexpensive,
and it operates from 5V dc. circuit scans eight LED/sensor pairs every 22 msec
and stores result in eight sample/hold (S/H) capacitors for interrogation by a
µP-driven ADC. purpose of circuit is to determine which sensor is above
line. |
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10 Tricks for Interfacing to the PIC16c508: (electronic circuit added 7/03) |
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101 at Keyboard to Ascii Decoder: Host to Keyboard Protocol is initiated by
taking KBD data line low. However to prevent keyboard from sending data at
same Time that you attempt to send keyboard data, it is common to take KBD
Clock line low for more than 60us. This is more than one bit length. n KBD data
line is taken low, while KBD clock line is released. (added 4/02) |
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12c508 Smart Lock: base sends a data sequence ( password) which is
recognized by key. key checks sequence and -if it recognizes it
-sends to base anor data sequence, as an answer to password. At Time
when base gets a correct answer (which means that key has been
introduced), relay is put into action, and it can command a number of consumers.
(added 4/02) |
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15-Step Digital Power Supply: (electronic Circuit / Schematic added 10/04) |
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16 bit adjustable reference uses 8 bit digital potentiometers: 12/25/03 EDN
Design Ideas / (added 6/06) It may be easy to find a precision
voltage reference for your application; however, a programmable precision reference is
anor matter. circuit in Figure 1 yields a precision reference with an LSB of
62.5 µV. circuit is a 16-bit DAC using three 8-bit digital potentiometers and
three CMOS op amps.... |
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16 Bit PC Serial Port Receiver (Cmos): (electronic circuit added 10/05)
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2 Transistors Form Bidirectional Level Translator: 11/07)/96 EDN-Design
Ideas / (added 5/03) -Illustrates a translation from5 to3V, but it can
accommodate almost any or voltage levels, provided logic-low levels are equal
(usually0V), translation from1 to100-Volt are possible although slow. |
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2 Wire LCD Interface using PIC16cf84: (schematic / circuit design added
9/02) |
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Digital or Logic Circuits: #'s
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