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Load Eight-Channel DAC from PC Port
08/03/95 EDN-Design Ideas The circuit in Fig 1 loads 4 address bits and 8 data bits into IC8's 8-bit octal, two-quadrant multiplying DAC from a PC parallel port. Initially, the circuit loads the desired data on the D0 through D7 pins of the parallel port into shift register IC1 when the parallel port's STR pin goes low. Next, the circuit loads the desired address from the port's D0 through D3 pins into register IC2 when the port's ALF pin goes low__ Circuit Design by Daniel Segarra, Sipex Corp, Billerica, MA
Low-Cost 6-Bit DAC
For controlling the load of appliances such as cooling fans, low-wattage heaters, thermostats, low-wattage light sources, small electrical toys and test benches for loudspeakers, we need a power source whose voltage...___ Electronics Projects for You
Low-Cost Digital DAC Provides Digital Three-Phase-Waveform Synthesis
7-Aug-08 EDN-Design Ideas Used in high volume in audio applications, a low-cost stereo DAC can generate three-phase AC waveforms in high precision__ Circuit Design by SA González, Universidad de Mar de Plata, Argentina, and R García-Gil, J Castelló, and JM Espí,Universidad de Valencia, Spain
Low-power, low-voltage ADC is 0.05% linear
06/19/97 EDN-Design Ideas The simple integrating 3V A/D converter in Figure 1a is small, requires no negative supply and no expensive precision components, and draws minimal supply current.__ Circuit Design by John Wettroth, Maxim Integrated Products, Sunnyvale, CA
LTC1451/52/53: 12-Bit Rail-To-Rail Micropower DACs in an SO-8
DN96 Design Notes___ Linear Technology/Analog Devices
Make a DAC with a microcontroller's PWM timer
09/05/02 EDN-Design Ideas Many embedded-microcontroller applications require generation of analog signals. An integrated or stand-alone DAC fills the role. However, you can often use PWM signals for generating the required analog signals. You can use PWM signals to create both dc and ac analog signals. This design idea shows how to use a PWM timer to simultaneously create a sinusoid, a ramp, and a dc voltage__ Circuit Design by Mike Mitchell, Texas Instruments Inc
Maximize Pulse-Width-Modulated DAC Throughput
03/22/13 EDN-Design Ideas This ramp-based DAC uses microcontroller-generated clocks and a sample-and-hold. Simple DACs realized by lowpass filtering microcontroller-generated pulse-width-modulated (PWM) signals have a response that is typically a tenth of the PWM frequency. This Design Idea is a novel implementation of a previously published method1 employing a reference ramp whose output is sampled and held by the PWM signal. This approach results in a throughput rate equal to the PWM frequency.__ Circuit Design by Ajoy Raman
Micropower ADC has eight differential channels
05/22/97 EDN-Design Ideas If you need a 12-bit ADC with eight differential channels for a portable, battery-powered data-acquisition system, you'll find that many 12-bit ADCs with configurable multiplexers are available. However, they all suffer from as much as 50% channel reduction when you require differential inputs. The circuit in Figure 1 overcomes the channel-reduction problem. It provIdeas eight differential-channel, 12-bit A/D conversion. The circuit uses a low-power, 12-bit, eight-channel ADC and a low-power, eight-channel multiplexer. The system communicates with a host processor over a serial connection.__ Circuit Design by Kevin Hoskins, Linear Technology, Milpitas, CA
Minimizing thermocouples maintains 20-bit DAC precision
05/03/01 EDN Technical Article: Undesirable and unintended thermocouples are the primary sources of error in low-drift circuits. Attention to layout and other construction details is the only way to tackle the problem.__ Circuit Design by Jim Williams, EDN's most revered contributor, passed away in June 2011 after a stroke. He was 63.
Multidecade BCD DAC Uses Resistors Of Only Six Values
4-Feb-10 EDN-Design Ideas DAC uses fewer resistors than that of a previous Design Idea__ Circuit Design by Marián Stofka, Slovak University of Technology, Bratislava, Slovakia
Multiphase DAC Modifies R-2R Ladder
01/18/96 EDN-Design Ideas The double-ladder DAC in Figure 1 suits ASIC or hybrid designs that require multiple DACs sharing an analog input but with different digital inputs and multiple analog outputs. The circuit is a modification of the standard R-2R resistive ladder in a CMOS
multiplying DAC. The two DAC sections in Figure 1 share the longitudinal__ Circuit Design by Alexander Belousov, SMP Inc, Rego Park, NY
Multiple Output Range 16-Bit DAC Design Made Simple
DN337 Design Notes___ Linear Technology/Analog Devices
New 16-Bit SO-8 DAC has 1LSB Max Inl & Dnl over Industrial Temperature Range Design Note 173
DN173 Design Notes __ Linear Technology/Analog Devices |
