R-2R Digital to Analog Converter
Use this circuit as a low cost alternative to a commercial DAC. It is important that the latch be a CMOS
device, so that the outputs drive to Vcc when they are high. (TTL devices only drive to 2.4 volts or so). __ Designed by billd @ reprise.com
Reduce Thermal Transients In R-2R Ladder
03/28/96 EDN-Design Ideas An R-2R resistive ladder network with a matched feedback resistor (Figure 1) is the core of the typical D/A converter, whether fabricated in discrete, hybrid, or CMOS
-monolithic form. In this configuration, thermal effects can degrade performance, causing poor settling characteristics and transfer-function nonlinearity in the low-frequency range. The addition of a second feedback resistor, R2, can reduce the degradation.__ Circuit Design by Alex Belousov, Standard Motor Products, Rego Park, NY
Resistive DAC & Op Amp Form Hybrid Divider
17-Sep-09 EDN-Design Ideas A programmable resistance is all you need in a feedback loop__ Circuit Design by Marián Štofka, Slovak University of Technology, Bratislava, Slovakia
S/PDIF to Analogue Converter
This is quite possibly the simplest S/PDIF receiver and DAC available. It uses the absolute minimum of parts, and also minimises the connections and control functionality usually provided. It is still a serious project, and is not recommended for beginners __ Designed by Rod Elliott ESP
Selecting Op Amps for Precision 16-Bit DACs
DN214 Design Notes___ Linear Technology/Analog Devices
Serial port drives low-cost, three-wire DACs
EDN Design Ideas03/03/1997 The circuit in Figure 1 allows you to control low-cost, three-wire D/A converters through a PC's serial port. A 74HC14 extracts the three signals (data, clock, and load) from the signal on one wire. The method relies on the data-pulse width: a short pulse is a logic 1; a long pulse is a logic 0. The serial-port settings are COM1/9600 baud/no parity/8 data bits. A logic 1 transmits as 255, which leads to a short pulse (start bit only); a logic 0 transmits as 0, which results in a pulse that's nine times longer. Figure 2 is the timing diagram for the process.__ Circuit Design by Bernard Willaert, Barco Display Systems, Kortrijk, Belgium
Simple Circuit converts 5V to –10V
26-May-05 EDN-Design Ideas Switched-capacitor circuit doubles, inverts dc source__ Circuit Design by Ken Yang, Maxim Integrated Products Inc, Sunnyvale, CA
Standards LAB Grade 20-Bit DAC with 0.1PPM/ °C Drift
AN86 Linear Technology This publication details a true 1ppm D-to-A converter. Total DC error of this processor corrected DAC remains within 1ppm from 18-32°C, including reference drift. DAC error exclusive of reference drift is substantially better. Construction details and performance verification techniques are included, along with a complete software listing. __ Linear Technology/Analog Devices
Technique Increases Low Cost DAC's Resolution
04/09/98 EDN-Design Ideas (Scroll to find this circuit) Cost-sensitive µC applications often employ resistor chains to implement crude DACs. You can extend this method by exploiting the way in which many µCs allow individual output pins to be set to either low ("0''), high ("1''), or floating ("F") states. A converter can thus respond to ternary rather than binary codes__ Circuit Design by Jeremy Dean, Thomson-Thorn Missile Electronics Ltd, Basingstoke, UK
Twin DAC's Produce True Bipolar Operation
08/18/94 EDN-Design Ideas The 8-bit multiplying DAC-08 is a versatile device that offers excellent performance at low cost. This DAC produces an output current that is the product of an 8-bit digital number and the input reference current.__ Circuit Design by
Ravindranathan, Naval Physical and Oceanographic Laboratory
Two DAC Adds & Subtracts
09/01/98 EDN-Design Ideas A typical way to add two binary words and provide an analog output is to use several digital ICs that drive a DAC. The circuit in Figure 1 eliminates the use of several digital-IC packages and, hence, the need for the digital power supply. The circuit simultaneously carries out addition and subtraction. File has many circuits, scroll down.__ Circuit Design by V Manoharan, Naval Physical and Oceanographic Laboratory, Kochi, India
Two-quadrant multiplying DAC utilizes octal CMOS
buffer
09/30/13 EDN-Design Ideas Here's a novel approach to making a multiplying DAC__ Circuit Design by Ajoy Raman |